The Prototyping Board comes with a 220 ? termination resistor and two 681 ? bias resis-
tors installed and enabled with jumpers across pins 1–2 and 5–6 on header JP5, as shown
R1
GND
GND
J8
NC
+3.3 V
D1
R52 R53
R60 R61
U7
VBT
/RES
VRAM
SMODE1
C1
C2
C3
PF0_CLKD
PF0_QD
RABBITNET
SM0
/IORD
D2
/IOWR
PG5
PG7
PG4
PG6
PE0
L1
L293D
H-DRIVER
U2
L293D
H-DRIVER
U3
R8 U6 C6
R9
PE1
PE4
PE6
PE3
PE5
R12
U1
J10
R13
C4
OUT
R14
C5
J11
PF7
OUT 00 01 02 03 04 05 06 07
BT1
PF5
PB7
PB5
PB6
PB4
R67
R68
R69
C8
U4
RP1
RP2
PB3
PB2
R70
U5
PB0
/RES_OUT
R16
R15
RCM3300
PROTOTYPING
BOARD
+5 V
+5 V
CORE MODULE
GND
GND
R27 R28
R25 R26
J14
RX13
U10
6 2
+3.3 V
R36
681 W
ACT
PD7
PD3
PD5
PG3
PG1
PC7
PC5
PC3
PC1
PF0
PF2
PA0
PA2
PA4
PA6
STAT
J9
LINK
PD6
PD2
PD4
PG2
PG0
PC6
PC4
PC2
PC0
PF1
PF3
PA1
PA3
PA5
PA7
GND
GND/EGND
JA
U8
C16
R21 R22 R23 R24
Q1 Q2 Q3 Q4
J12
R50
D4
Q6
D5
JB
D6
D7
CX1
UX1
SO20W
CX2
UX2
SO20W
J13
C22
C23
C24
+3.3 V
RX14
RX15
U9
DX1
DX2
R36
JP5
C26
RX16
RX17
RX18
UX4
UX5
U10
R35
R38
LCD1JA
R39 J15
R40
U11 7 U12 6
+3.3 V
485+
C19 R42
D8
PAD DISPL
K E Y 485? AY B O A R D
JP5
K1
1
5
J16
bias J17
Q5 R47
termi- R38
nation 220 W
bias R37
C29 C30 681 W
R49
S1
RESET
S2
S3
CORE
DS2 DS3 DS4 DS5 DS6
TxE RxE GND TxF RxF 485+ GND 485?
LCD1JB
LCD1JC
2
4
6
Factory
Default
JP5
1
3
5
Figure B-9. RS-485 Termination and Bias Resistors
For best performance, the termination resistors in a multidrop network should be enabled
only on the end nodes of the network, but not on the intervening nodes. Jumpers on boards
whose termination resistors are not enabled may be stored across pins 1–3 and 4–6 of
header JP5.
B.4.7 RabbitNet Ports
The RJ-45 jack labeled RabbitNet is a clocked SPI RS-422 serial I/O expansion port for
use with RabbitNet peripheral boards. The RabbitNet jack does not support Ethernet con-
nections. Header JP3 must have pins 2–3 jumpered when using the RabbitNet port.
The RabbitNet port is enabled in software by setting PD2 = 1. Note that the RabbitNet
port and the J11 interface cannot be used simultaneously.
User ’s Manual
89
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